Monday – February 29th
11:00am – 12:00pm // Jacobs Hall (EBU1) // Booker Conference Suite #2512
User’s everyday outgrowing demand for high-data-rate and high-performance mobile devices pushes industry and researchers into more sophisticated systems to fulfill those expectations. In this presentation, the challenges and suitable solutions to improve the performance of wireless transceivers are addressed. At first, a novel PA will be presented with an adaptive matching network and a nonlinearity cancelation technique. Next, to address the coexistence of UWB and narrow band receivers (RX), an efficient 400 Mpulse/s IR-UWB transmitter with minimum interference level to the nearby RX (5GHz WiFi) will be presented. On the RX side, a wideband RX architecture with a 1.8dB NF and a +5 dBm IIP3 is proposed to break the tradeoff between NF and linearity. The design is also optimized for carrier aggregation scenarios. For cognitive and software defined radios, with stronger out of band blocker requirements, a new RX design and optimization is proposed. With different linearity techniques, an IIP3 of +22 dBm is achieved. At last, with the emergence of new technologies and applications in communications, there are new and growing challenges in the analog/RFIC designs. Circuit blocks in transceivers need an innovative approach to accommodate the new requirements. An overview of the new research topics and some possible solutions are summarized.
DR. HAJIR HEDAYATI received his Ph.D. degree in Electrical Engineering from the Texas A&M University in 2014. Since 2014, he has been with Qualcomm Technologies Inc., R&D Division in San Diego, CA, designing CMOS RFIC products for handsets. His research interests include the analysis and development of analog/RF integrated circuits for wireless/wireline communication applications.
Dr. Hedayati was the recipient of Best Student Paper Awards at the 2014 IEEE RFIC Symposium for his paper on a high-performance receiver and the 2011 Intel/Helic/CICC Student Scholarship Award for his paper on a reconfigurable linearized power amplifier. He was also recognized as an outstanding performance RFIC engineer for two consecutive review cycles by the review team Qualcomm in 2015 for his numerous contributions to the Qualcomm RFIC team. He has authored and coauthored 8 patents pending/granted and numerous technical papers.