My research addresses the computational needs and energy constrains of next generation wireless communications applications, a new generation of DSP architectures is critically needed. One major challenge is related to the need for programmability to cope with multiple incompatible standards and evolving protocols and features. Programmability is related to the enormous computational needs expected for emerging broadband wireless applications. Sophisticated digital communications techniques, such as OFDM and space-time processing may be needed to achieve the desired data rates for multi-signal processors (DSPs). To provide adequate computational power, multiple DSPs operating at extremely high clock speeds will likely be needed. However, the power consumption of this approch may be prohibitive for battery constrained mobile applications. I propose a programmable architecture that is both high performance and power efficient. The architecture incorporates sophisticated power management features to avoid unnecessary consumption of power.

Bill Lin received his B.S., M.S., and Ph.D degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1985, 1988, and 1991, respectively. Since 1997, he has been with the Department of Electrical and Computer Engineering at the University of California, San Diego, where he is affiliated with the Center for Wireless Communications. His current research interests are primarily in the areas of novel software-hardware architectures for wireless multimedia, reconfigurable, and embedded systems, and electronic system design automation for designing them. Prior to joining the faculty at UCSD, he was heading a research team at IMEC, Belgium, working on various aspects of advanced system design automation and implementation techniques for embedded systems. He has previously held summer positions at Hewlett Packard, Hughes Electronics, and Western Digital.

His research has led to over 70 journal and conference publications. He has received a number of publication awards, including a best paper award at DAC'87, distinguished paper citations at VLSI'89 and ICCAD'90, a best paper nomination at DAC'94, and the 1995 best journal paper award in the IEEE Transactions on VLSI Systems. He has served on panels and given invited presentations at major conferences, including ICCAD, EDTC, and the CODES/CASHE workshop. He has served on program committees of many international conferences, including the DAC and EDTC conferences.