The research consists of the following five projects - High Efficiency Power Amplifiers and Transmitters for 5G and 6G Applications, Digital PLLs with Sub-100 fs jitter for Local Oscillator Frequency Synthesis, Powering and Communicating with the Internet-of-(Medical)-Things (IoMT), Low-Power mm-wave Circuits for Efficient Mobile Systems Beyond 5G and Directional Antennas using Phased-Arrays for 6G. The projects are separate but are related in that they will develop critical circuits for 5G and future-generation wireless applications. The projects are out-lined briefly in full overview (linked below) of Circuits and Techniques for 5G Mobile Communications and Beyond.


High Efficiency Integrated Power Supply Modulators for sub-6GHz 5G Transmitters

Power supply modulators are critical components for the implementation of mm-wave and sub-6GHz 5G systems, especially the base-stations.  In addition to high power and efficiency, good linearity and compact size are required, since front-end electronics must be scaled down to sizes of a medium pizza-box size for massive MIMO for sub-6GHz remote radio heads. Toward these goals, having a fast and efficient power converter for envelop tracking to improve the efficiency of the transmitters proves to be critical for the system’s development, sustainability, and scalability. 


An Energy Efficient 5G LNA Exploiting Current Reuse

With the surge in IoT applications and the fast proliferation of Bluetooth Low Energy (BLE) receivers, the need for low power RF front-ends has grown significantly over the past several years. Low noise amplifiers (LNAs) with low noise figures are extremely important in such systems. Similarly, power is important in all mobile applications. 


High Efficiency Power Amplifiers for 5G and 6G Millimeter-Wave Applications

Power amplifier performance continues to be an important issue for mm-wave 5G and 6G system design and deployment.  This project will investigate techniques for improving maximum power, back-off efficiency and linearity in power amplifiers for 5G and 6G, with target frequencies including 28 GHz, 70-90 GHz and 140 GHz.  The investigation will include CMOS-SOI, SiGe HBT, GaN FET and InP HBT technologies, benchmarking circuits by simulation and supported with IC fabrication where appropriate.


Low-Power RF LO-free Receivers for 5G/6G, WiFi 6/7, and IoT Applications

RF LO generation is starting to become a real power consumption bottleneck in high-performance 5G/WiFi systems that are pushing 1024- and 4096-QAM. Surprisingly, the power consumption of RF LO generation is also dominating lower-power applications like NB-IoT due to strict reciprocal mixing specifications resulting from operation in congested spectral environments.


Adaptive Cancellation of Dynamic Error in High-Resolution RF DACs

The most significant sources of both static and dynamic nonlinear error in practical high-speed, high-resolution, continuous-time RF DACs are clock skew, component mismatches, and inter-symbol interference (ISI). Most published digital calibration techniques aimed at addressing these issues are only capable of reducing the static portion of such error, which leaves dynamic error as a major limitation. Techniques such as return-to-zero (RZ) signaling can be used to mitigate ISI, but they generally have undesirable side effects, such as halving the signal power and significantly increasing sensitivity to clock jitter, which greatly increase power consumption and/or decrease signal-to-noise-and-distortion ratio (SNDR).